1. Field of the Invention
This invention relates to semiconductor devices and, more particularly to an annealing process for the activation of ion implanted compound semiconductors such as gallium arsenide.
2. Description of the Prior Art
Ion implantation of doping species into semi-insulating wafers of gallium arsenide followed by thermal annealing and activation has been demonstrated as a viable technique in the preparation of electronic devices, in particular, field effect transistors, injection lasers, and monolithic integrated circuits. Numerous methods for the activation of implanted species in gallium arsenide have been described in the literature but none has yet fulfilled the need for commercially applicable technology. During the anneal process the temperature of the gallium arsenide material is raised, such as for example, to 850.degree. C. for 30 minutes wherein the constituents gallium and arsenide tend to evaporate non-stoichiometrically from the gallium arsenide wafer.
Three factors determine the properties of a thermally activated implant: (1) the energy and uniformity of the implanted dose, (2) the purity and stoichiometry of the gallium arsenide wafer, and (3) the reliability of the activation and anneal process. Commercially available ion-implanting machines offer close tolerances of ion impurity, ion energy, and ion distribution; typically, less than 3% variation in properties across a 3-inch diameter field is quoted in technical specifications. In the past the purity and stoichiometry of the gallium arsenide wafer have been variable, especially with Bridgman-grown ingots which were compensated by heavy chromium doping, and frequently contained trap concentrations comparable to the implanted dose. More recently a very reliable gallium arsenide wafer has become available which is prepared by liquid-encapsulated Czochralski (LEC) growth in pyrolytic boron nitride (PBN) crucibles. These (100) orientation large-diameter (2 and 3 inch) crystals contained trap concentrations at least an order of magnitude below that of the implanted dopant normally employed in fabricating field effect transistors and integrated circuits. Therefore, researchers in industry have turned their attention to the third factor, the activation of an implanted dose in PBN LEC gallium arsenide wafers to perfect a commercially attractive, ion implanted, elecronic device technology for gallium arsenide. The minimum temperature for substantial implant activation in gallium arsenide is between 750.degree. C. and 800.degree. C. This high temperature is necessary in order to anneal damage present in the gallium arsenide lattice caused by the penetration of high-energy ions, and to move the implanted ions to electrically activate substitutional sites. Straightforward heating of a gallium arsenide wafer to the activation temperature suffers from two drawbacks. First, the vapor pressure of gallium arsenide is substantial in this temperature range, so that the gallium arsenide surface is eroded; second, the evaporation is not congruent, so the arsenic and gallium losses are not equal. From the vapor pressure/temperature diagram for gallium arsenide, it is clear that any temperature above the congruent evaporation temperature (650.degree. C.) that might be used to activate an implant will result in incongruent loss of the wafer surface. The result of incongruent wafer loss is evident as surface roughness and a substantial arsenide vacancy concentration.
Techiques intended to prevent wafer erosion during thermal activation can be divided into two types: capped and capless. In capped annealing, the implanted gallium arsenide wafer is coated with a thin encapsulant (cap) of inert material to prevent any loss of volatile elements during the high temperature implantation anneal. Investigated caps include SiO.sub.2, Si.sub.3 N.sub.4, Al.sub.2 O.sub.3, AlN, Ga.sub.2 O.sub.3, and Al.
Numerous problems are associated with capped annealing. The cap in the gallium arsenide may react or interdiffuse during the anneal, contamination of the cap may contaminate the implant, non-uniform cap deposition may give rise to pinholes or surface eruptions, and thermal stresses may arise between the cap and the wafer that affect the electrical properties of the implants or cause cracking of the cap with consequent wafer loss.
In the capless annealing technique, the implanted gallium arsenide wafer is annealed in an atmosphere to prevent out-gassing of the wafer. The wafer would then retain its stoichiometric nature without the use of a cap. In a paper entitled "Semi-Sealing Capless Anneal of GaAs," by J. Kasahara and N. Watanabe, published in Jap. Jnl. Appl. Phys., Vol. 19, No. 11, p. L679 (1980), arsenic was used as a source of arsenic overpressure during anneal of gallium arsenide wafers. In a paper entitled "Capless Anneal of Ion Implanted GaAs in a Controlled Arsenic Vapor," by J. Kasahara, M. Arai and N. Watanabe, published in J. Appl. Phys. Vol. 50, No. 1, p. 541 (1979), arsine gas was used as a source of arsenic overpressure during anneal of gallium arsenide wafers.
In a paper entitled "Proximate Capless Annealing Using a Controlled-Excess as Vapor Pressure Source," by J. M. Woodall, H. Rupprecht and R. J. Chicotka, published in Appl. Phys. Lett. 38(8), p. 639 (1981), indium arsenide was used as a source of arsenic overpressure during anneal of gallium arsenide wafers. It should be noted, however, that the methods incorporating arsenic overpressure do not prevent erosion of the gallium arsenide wafer but merely reduce wafer loss to that of the gallium evaporation loss. Measurements of wafer loss of 1,000 Angstroms per hour have been observed during arsenic-stabilized annealing, leading to a buildup of non-volatile, compensating impurities on the surface of the wafer, together with a gallium vacancy concentration. These deficiencies are particularly damaging to an implanted-device technology, since most implant profiles are of submicron dimensions. Furthermore, the formation of ohmic contacts and Schottky barrier contacts for device construction crucially depend on low surface-compensation ratios, a requirement not met by arsenic overpressure methods.
In proximity cap annealing technique, implanted wafers, perfectly parallel polished and of the same crosssection, are stacked upon each other and heated to the anneal temperature, the loss of material from the implanted wafer surface would be small, since the available volume for evaporation is minimized. In a paper entitled "Ion Implanted Gallium Arsenide with Proximity Cap Annealing," by R. P. Mandal and W. R. Scoble, published in Gallium Arsenide and Related Compounds 1978, Inst. Phys. Conf. Ser. No. 45, Ch. 6, p. 462 (1979), discusses proximity cap annealing. In a paper entitled "Close Contact Annealing of Ion Implanted GaAs and InP," Appl. Phys. Lett. 36, No. 11, p. 927 (1980) by B. Molnar, proximity cap annealing was discussed. In these papers, both P and N type implants have been activated with up to 80% differential activation efficiency. However, significant variations in activation were observed between the center and edge of a boule as discussed in a paper entitled "Segregation Effects on Electrical Properties of Ion Implanted Proximity Annealed GaAs (Cr)," by W. M. Duncan, F. H. Doerbeck and G. E. Brehm, published in Workshop on Compound Semiconductors and Devices WOCSEMMAD (1981). With proximity cap annealing, the least-activated regions are around the edges of the wafers. For a proximity cap anneal to operate successfully, the wafers must be touching over most of the active surface, a difficult achievement over a 2- or 3-inch diameter wafer, allowing for the capricious possibility of dust particles, thermal stress, bowing, etc., making the process somewhat unreliable.
In a paper entitled "Annealing of Ion Implanted GaAs in a Controlled Atmosphere," by R. M. Malbon, D. H. Lee, and J. M. Whelan, published in the J. Electrochem. Soc., Vol. 123, No. 9, p. 1413 (1976), implanted 2 centimeter square wafers of epitaxial gallium arsenide were annealed using an arsenic pressure from a gallium/gallium arsenide mixture and a small hydrogen flow. It is believed that the vapor pressure of arsenic produced by a hot mixture of gallium in gallium arsenide is not predictable and as a consequence, the annealing of implants by using this technique would not be reproducible.
It is therefore desirable to provide a capless annealing technique for the activation of N and P type implants in gallium arsenide at a relatively low temperature that shows high uniformity and reproducible activation.
It is further desirable to provide a capless annealing process which is both rapid and adaptable to volume production of gallium arsenide wafers.
It is further desirable to provide a capless annealing process which yields a gallium arsenide wafer morphology indistinguishable from the "as polished" condition.
It is further desirable to provide a capless annealing process wherein stablilizing overpressures for all the substrate constituents are provided such as both gallium and arsenic in the case of the gallium arsenide example.
It is further desirable to provide a capless annealing process wherein these overpressures are generated from the purest possible source as may be achieved from undoped sacrificial wafers crushed to enhance the sublimation area.
It is further desirable to provide a capless annealing process in a vapor phase epitaxy-like configuration such that proper generation of the appropriate overpressures of all substrate constitutents can be demonstrated by growth of high quality homoeptiaxial layers in the same apparatus.